1) Explain 7-Segment LED Display.
An LED or Light Emitting Diode, is a solid state optical pn-junction diode which emits light energy in the form of photons.
But the main advantage of light emitting diodes is that because of their small die size, several of them can be connected together within one small and compact package producing what is generally called a 7-segment Display.
The emission of these photons occurs when the diode junction is forward biased by an external voltage allowing current to flow across its junction, and in Electronics we call this process electroluminescence.
The actual colour of the visible light emitted by an LED, ranging from blue to red to orange, is decided by the spectral wavelength of the emitted light which itself is dependent upon the mixture of the various impurities added to the semiconductor materials used to produce it.
Light emitting diodes have many advantages over traditional bulbs and lamps, with the main ones being their small size, long life, various colours, cheapness and are readily available, as well as being easy to interface with various other electronic components and digital circuits.
The 7-segment display, also written as “seven segment display”, consists of seven LEDs (hence its name) arranged in a rectangular fashion as shown. Each of the seven LEDs is called a segment because when illuminated the segment forms part of a numerical digit (both Decimal and Hex) to be displayed.
2) What are the various registers of 8085 ? and its Function.
(a) General Purpose Registers –
The 8085 has six general-purpose registers to store 8-bit data; these are identified as- B, C, D, E, H, and L. These can be combined as register pairs – BC, DE, and HL, to perform some 16-bit operation. These registers are used to store or copy temporary data, by using instructions, during the execution of the program.
(b) Specific Purpose Registers –
- Accumulator:
The accumulator is an 8-bit register (can store 8-bit data) that is the part of the arithmetic and logical unit (ALU). After performing arithmetical or logical operations, the result is stored in accumulator. Accumulator is also defined as register A.
- Flag registers: The flag register is a special purpose register and it is completely different from other registers in microprocessor. It consists of 8 bits and only 5 of them are useful. The other three are left vacant and are used in the future Intel versions.These 5 flags are set or reset (when value of flag is 1, then it is said to be set and when value is 0, then it is said to be reset) after an operation according to data condition of the result in the accumulator and other registers. The 5 flag registers are:
- Sign Flag
- Zero Flag
- Auxiliary Carry Flag
- Note – This is the only flag register in 8085 which is not accessible by user.
- Parity Flag
- Carry Flag
(c) Memory Registers –
There are two 16-bit registers used to hold memory addresses. The size of these registers is 16 bits because the memory addresses are 16 bits. They are :-
- Program Counter
- Stack Pointer
- Sign Flag (7th bit)
- Zero Flag (6th bit)
- Auxiliary Carry Flag (4th bit)
- Parity Flag (2nd bit)
- Carry Flag (0th bit)
3)Pin Diagram of 8085 Microprocessor
1. Address Bus and Data Bus:
The address bus is a group of sixteen lines i.e A0-A15. The address bus is unidirectional, i.e., bits flow in one direction from the microprocessor unit to the peripheral devices and uses the high order address bus.
2. Control and Status Signals:
- ALE – It is an Address Latch Enable signal. It goes high during first T state of a machine cycle and enables the lower 8-bits of the address, if its value is 1 otherwise data bus is activated.
- IO/M’ – It is a status signal which determines whether the address is for input-output or memory. When it is high(1) the address on the address bus is for input-output devices. When it is low(0) the address on the address bus is for the memory.
- SO, S1 – These are status signals. They distinguish the various types of operations such as halt, reading, instruction fetching or writing.
- RD’ – It is a signal to control READ operation. When it is low the selected memory or input-output device is read.
- WR’ – It is a signal to control WRITE operation. When it goes low the data on the data bus is written into the selected memory or I/O location.
- READY – It senses whether a peripheral is ready to transfer data or not. If READY is high(1) the peripheral is ready. If it is low(0) the microprocessor waits till it goes high. It is useful for interfacing low speed devices.
- Vcc – +5v power supply
- Vss – Ground Reference
- XI, X2 – A crystal is connected at these two pins. The frequency is internally divided by two, therefore, to operate a system at 3MHZ the crystal should have frequency of 6MHZ.
- CLK (OUT) – This signal can be used as the system clock for other devices.
- INTR – It is an interrupt request signal.
- INTA’ – It is an interrupt acknowledgement sent by the microprocessor after INTR is received.
- RESET IN’ – When the signal on this pin is low(0), the program-counter is set to zero, the buses are tristated and the microprocessor unit is reset.
- RESET OUT – This signal indicates that the MPU is being reset. The signal can be used to reset other devices.
- HOLD – It indicates that another device is requesting the use of the address and data bus. Having received HOLD request the microprocessor relinquishes the use of the buses as soon as the current machine cycle is completed. Internal processing may continue. After the removal of the HOLD signal the processor regains the bus.
- HLDA – It is a signal which indicates that the hold request has been received after the removal of a HOLD request, the HLDA goes low.
IO/M’ | S1 | S0 | Data Bus Status |
---|---|---|---|
0 | 1 | 1 | Opcode fetch |
0 | 1 | 0 | Memory read |
0 | 0 | 1 | Memory write |
1 | 1 | 0 | I/O read |
1 | 0 | 1 | I/O write |
1 | 1 | 1 | Interrupt acknowledge |
0 | 0 | 0 | Halt |
3. Power Supply and Clock Frequency:
4. Interrupts and Peripheral Initiated Signals:
The 8085 has five interrupt signals that can be used to interrupt a program execution.
(i) INTR
(ii) RST 7.5
(iii) RST 6.5
(iv) RST 5.5
(v) TRAP
The microprocessor acknowledges Interrupt Request by INTA’ signal. In addition to Interrupts, there are three externally initiated signals namely RESET, HOLD and READY. To respond to HOLD request, it has one signal called HLDA.
5. Reset Signals:
6. DMA Signals:
7. Serial I/O Ports:
Serial transmission in 8085 is implemented by the two signals,
Time required to execute and fetch an entire instruction is called instruction cycle. It consists:
- Fetch cycle – The next instruction is fetched by the address stored in program counter (PC) and then stored in the instruction register.
- Decode instruction – Decoder interprets the encoded instruction from instruction register.
- Reading effective address – The address given in instruction is read from main memory and required data is fetched. The effective address depends on direct addressing mode or indirect addressing mode.
- Execution cycle – consists memory read (MR), memory write (MW), input output read (IOR) and input output write (IOW)
The term “Register Transfer” can perform micro-operations and transfer the result of operation to the same or other register.
Micro-operations :
The operation executed on the data store in registers are called micro-operations. They are detailed low-level instructions used in some designs to implement complex machine instructions.
Register Transfer :
The information transformed from one register to another register is represented in symbolic form by replacement operator is called Register Transfer.
Replacement Operator :
In the statement, R2 <- R1, <- acts as a replacement operator. This statement defines the transfer of content of register R1 into register R2.
There are various methods of RTL –
- General way of representing a register is by the name of the register inclosed in a rectangular box.
- Register is numbered in a sequence of 0 to (n-1).
- The numbering of bits in a register can be marked on the top of the box.
- A 16-bit register PC is divided into 2 parts- Bits (0 to 7) are assigned with lower byte of 16-bit address and bits (8 to 15) are assigned with higher bytes of 16-bit address.
Register Transfer Operations:
The operation performed on the data stored in the registers are referred to as register transfer operations.
There are different types of register transfer operations:
1. Simple Transfer – R2 <- R1
The content of R1 are copied into R2 without affecting the content of R1. It is an unconditional type of transfer operation.
2. Conditional Transfer – It indicates that if P=1, then the content of R1 is transferred to R2. It is a unidirectional operation.
3. Simultaneous Operations –
If 2 or more operations are to occur simultaneously then they are separated with comma (,).
When microprocessor receives interrupt signals, it sends an acknowledgement (INTA) to the peripheral which is requesting for its service.
Interrupts can be classified into various categories based on different parameters:
- Hardware and Software Interrupts –
When microprocessors receive interrupt signals through pins (hardware) of microprocessor, they are known as Hardware Interrupts. There are 5 Hardware Interrupts in 8085 microprocessor. - Vectored and Non-Vectored Interrupts –
Vectored Interrupts are those which have fixed vector address (starting address of sub-routine) and after executing these, program control is transferred to that address. - Non-Vectored Interrupts are those in which vector address is not predefined. The interrupting device gives the address of sub-routine for these interrupts. INTR is the only non-vectored interrupt in 8085 microprocessor.
Maskable Interrupts are those which can be disabled or ignored by the microprocessor. These interrupts are either edge-triggered or level-triggered,
When microprocessor receives multiple interrupt requests simultaneously, it will execute the interrupt service request (ISR) according to the priority of the interrupts.
1. Single Byte Transfer Mode/ Cycle Stealing
- Once the DMAC becomes the bus master, it will transfer only ONE BYTE and return the bus back to the microprocessor. As soon as the microprocessor performs one bus cycle, DMAC will once again take the bus back from the microprocessor.
- Both DMAC and microprocessor are constantly stealing bus cycles from each other. It is the most popular method of DMA, because it keeps the microprocessor active in the background.
- After a byte is transferred, the CAR and CWCR are adjusted accordingly. The system bus is returned to the µP. For further bytes to be transferred, the DREQ line must go active again, and then the entire operation is repeated.
2. Block Transfer Mode.
In this mode, the DMAC is programmed to transfer all the bytes in one complete DMA operation. After a byte is transferred, the CAR and CWCR are adjusted accordingly.
The system bus is returned to the µP, only after all the bytes are transferred. i.e. TC is reached or EOP signal is issued. It is the fastest form of DMA but keeps the microprocessor inactive for a long time.
The DREQ signal needs to be active only in the beginning for requesting the DMA service initially. Thereafter DREQ can become low during the transfer.
3. Demand Transfer Mode
It is very similar to Block Transfer, except that the DREQ must active throughout the DMA operation.
If during the operation DREQ goes low, the DMA operation is stopped and the busses are returned to the µP.
In the meantime, the µP can continue with its own operations. Once DREQ goes high again, the DMA operation continues from where it had stopped.
4. Cascade Transfer Mode
In this mode, more than one DMACs are cascaded together. It is used to increase the number of devices interfaced to the µP. Here we have one Master DMAC, to which one or more Slave DMACs are connected.
The Slave gives HRQ to the Master on the DREQ of the Master, and the Master gives HRQ to the µP on the HOLD of the µP.
In 8085 microprocessor there are 5 types of addressing modes:
- Immediate Addressing Mode – In immediate addressing mode the source operand is always data. If the data is 8-bit, then the instruction will be of 2 bytes, if the data is of 16-bit then the instruction will be of 3 bytes.
- Register Addressing Mode – In register addressing mode, the data to be operated is available inside the register(s) and register(s) is(are) operands. Therefore the operation is performed within various registers of the microprocessor.
- Direct Addressing Mode – In direct addressing mode, the data to be operated is available inside a memory location and that memory location is directly specified as an operand. The operand is directly available in the instruction itself.
- Register Indirect Addressing Mode – In register indirect addressing mode, the data to be operated is available inside a memory location and that memory location is indirectly specified by a register pair.
- Implied/Implicit Addressing Mode – In implied/implicit addressing mode the operand is hidden and the data to be operated is available in the instruction itself.
- Input Devices:
- Output Devices:
- Storage Devices:
The part of the computer that performs the bulk of data-processing operations is called the central processing unit and is referred to as the CPU.
The CPU is made up of three major parts, the register set stores intermediate data used during the execution of the instructions. The arithmetic logic unit (ALU) performs the required microoperations for executing the instructions. The control unit supervises the transfer of information among the registers and instructs the ALU as to which operation to perform.
The CPU performs a variety of functions dictated by the type of instructions that are incorporated in the computer.
This includes the instruction formats, addressing modes, the instruction set, and the general organization of the CPU registers.
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In a basic computer, each instruction cycle consists of the following phases:
- Fetch instruction from memory.
- Decode the instruction.
- Read the effective address from memory.
- Execute the instruction.
Immediate Addressing Mode-
In this addressing mode,
- The operand is specified in the instruction explicitly.
- Instead of address field, an operand field is present that contains the operand.
Indexed Addressing Mode-
In this addressing mode,
- Effective address of the operand is obtained by adding the content of index register with the address part of the instruction.
Effective Address= Content of Index Register + Address part of the instruction
= Content of Index Register + Address part of the instruction
Relative Addressing Mode-
In this addressing mode,
- Effective address of the operand is obtained by adding the content of program counter with the address part of the instruction.
Effective Address = Content of Program Counter + Address part of the instruction |
NOTE-
- Program counter (PC) always contains the address of the next instruction to be executed.
- After fetching the address of the instruction, the value of program counter immediately increases.
- The value increases irrespective of whether the fetched instruction has completely executed or not.
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